DocumentCode
3544405
Title
The impact of assist-circuit design for 22nm SRAM and beyond
Author
Karl, E. ; Zheng Guo ; Yong-Gee Ng ; Keane, John ; Bhattacharya, Ujjwal ; Zhang, Kai
Author_Institution
Adv. Design, Logic Technol. Dev., Intel, Hillsboro, OR, USA
fYear
2012
fDate
10-13 Dec. 2012
Abstract
Increasing process variation in advanced technology nodes requires sustained process and circuit innovation to meet yield, performance and margin requirements for SRAM memories. Memory assist circuits are becoming an important tool in co-developing critical scaled memory solutions and can have significant impact on process optimization, as well as power consumption, minimum operating voltage and performance of memories.
Keywords
SRAM chips; circuit optimisation; integrated circuit design; integrated circuit yield; power consumption; SRAM memory; assist-circuit design; circuit innovation; critical scaled memory solution; margin requirement; memory assist circuit; memory performance; performance requirement; power consumption; process optimization; process variation; size 22 nm; technology node; yield requirement; Arrays; CMOS integrated circuits; Circuit stability; MOS devices; Memory management; Random access memory; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting (IEDM), 2012 IEEE International
Conference_Location
San Francisco, CA
ISSN
0163-1918
Print_ISBN
978-1-4673-4872-0
Electronic_ISBN
0163-1918
Type
conf
DOI
10.1109/IEDM.2012.6479099
Filename
6479099
Link To Document