Reduced latency arithmetic decoder for JPEG2000 block decoding

Block decoding in JPEG2000 consists of a bitplane decoder coupled tightly to an MQ arithmetic decoder. The bitplane decoder presents contexts to the arithmetic decoder which are used to drive a probability model used to decode sample bits from the compressed bitstream. The bitplane decoder, in most cases, requires the decoded result before it can produce the next context. Arithmetic decoders which have a latency of one or more clock cycles will thus limit the throughput of the block decoder. We present a new method of performing probability estimation that can reduce arithmetic decoder latency. This enables the block decoder to process one sample bit per clock cycle, whilst increasing the area of the arithmetic decoder by only 1.3 times.