Decoupling capacitance allocation in noise-aware floorplanning based on DBL representation

The dynamic structure of a hierarchical stair contour is firstly proposed to maintain an incremental floorplan contour for the placement of a sequence of given blocks. Based on the LB-packing process of any given block in a compact floorplan, a double-bound list (DBL) is further proposed to represent the geometrical adjacent relations in a compact floorplan. Finally, an SA-based approach based on the combination of one rectangular-packing process and one LB-packing process as one perturbation operation is proposed to allocate and integrate the possible decaps of all the blocks into the original floorplan. Experimental results show that our proposed SA-based allocation approach based on DBL representation obtains very promising results for MCNC benchmark circuits.