DocumentCode
3545230
Title
Single-electron circuit for inhibitory spiking neural network with fault-tolerant architecture
Author
Oya, Takahide ; Asai, Tetsuya ; Amemiya, Yoshihito ; Schmid, Alexandre ; Leblebici, Yusuf
Author_Institution
Dept. of Electr. Eng., Hokkaido Univ., Sapporo, Japan
fYear
2005
fDate
23-26 May 2005
Firstpage
2535
Abstract
An inhibitory spiking neural network that uses single-electron circuit devices is described. The network consists of a number of identical neuron circuits constructed from single-electron oscillators with coupling capacitors. The neurons are cross-connected in a competing fault-tolerant architecture. Computer simulations show that the proposed circuit is capable of overcoming a high rate of random device failure.
Keywords
coupled circuits; fault tolerance; nanoelectronics; neural chips; oscillators; single electron devices; artificial neural network; capacitor coupled single-electron oscillators; competing fault-tolerant architecture; cross-connected neurons; inhibitory spiking neural network; nanoelectronics; nonlinear oscillator; single-electron circuit devices; Artificial neural networks; Circuit noise; Circuit simulation; Computer architecture; Coupling circuits; Fault tolerance; Fault tolerant systems; Neural networks; Neurons; Oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN
0-7803-8834-8
Type
conf
DOI
10.1109/ISCAS.2005.1465142
Filename
1465142
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