Design of high-speed image processing system based on FPGA

Author

Zhang, Xinxi ; Li, Yong ; Wang, Jinyang ; Chen, Yulin

Author_Institution

Dept. of Control Eng., Acad. of Armored Force Eng., Beijing, China

fYear

2009

fDate

16-19 Aug. 2009

Firstpage

23833

Lastpage

25294

Abstract

A high-speed image processing system is designed in this paper in order to resolve the problems such as low system integration, slow-speed processing existing in image processing of vehicle-loaded computer. The system realizes functions of image acquisition, memorizing and overlapping by configuring Nios II soft core CPU and function modules such as image preprocessing, processing and display to build main hardware on a FPGA chip and by designing of system software. Due to using programmable chips and parallel processing technology, the system has high integration, good maintenance, quick image processing speed and strong real-time capability.

Keywords

field programmable gate arrays; image processing; logic design; FPGA chip; Nios II soft core CPU; high-speed image processing system; image acquisition; vehicle-loaded computer; Computer displays; Field programmable gate arrays; Hardware; Image processing; Image resolution; Parallel processing; Process design; Real time systems; Software design; System software; FPGA; Image Processing; Nios II CPU;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Measurement & Instruments, 2009. ICEMI '09. 9th International Conference on

Conference_Location

Beijing

Print_ISBN

978-1-4244-3863-1

Electronic_ISBN

978-1-4244-3864-8

Type

conf

DOI

10.1109/ICEMI.2009.5274670

Filename

5274670