• DocumentCode
    3546229
  • Title

    3-D wiring across vertical sidewalls of Si photo cells for series connection and high voltage generation

  • Author

    Kumagai, S. ; Yamamoto, T. ; Kubo, H. ; Sasaki, M.

  • Author_Institution
    Toyota Technol. Inst., Nagoya, Japan
  • fYear
    2012
  • fDate
    Jan. 29 2012-Feb. 2 2012
  • Firstpage
    60
  • Lastpage
    63
  • Abstract
    This paper first reports 3-D wiring across vertical sidewalls for summing the voltage of Si photo cells fabricated based on the photolithography. Si photo cells on the buried oxide are isolated each other by the buried oxide layer and the Si etching of the device layer. Wiring using the vertical sidewalls minimizes the shadow region caused by the metal electrode. The techniques of the spray coating of the photoresist and the angled exposure through the absorbent liquid are applied. 10×10 array of cells with 100-μm spans are connected in series generating 10.1V.
  • Keywords
    elemental semiconductors; etching; photoelectric cells; photolithography; silicon; 3D wiring; buried oxide layer; etching; high voltage generation; photo cells; series connection; vertical sidewalls; Arrays; Coatings; Electrodes; Films; Resists; Silicon; Wiring;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Micro Electro Mechanical Systems (MEMS), 2012 IEEE 25th International Conference on
  • Conference_Location
    Paris
  • ISSN
    1084-6999
  • Print_ISBN
    978-1-4673-0324-8
  • Type

    conf

  • DOI
    10.1109/MEMSYS.2012.6170093
  • Filename
    6170093