DocumentCode
3547264
Title
A macro-model for the efficient simulation of an ADC-based RNG
Author
Pareschi, Fabio ; Setti, Gianluca ; Rovatti, Riccardo
Author_Institution
DI, Ferrara Univ., Italy
fYear
2005
fDate
23-26 May 2005
Firstpage
4349
Abstract
We present a macro-model for a true random number generator which internally exploits a pipeline analog-to-digital converter modified to operate as an interleaved chaotic map. The model is tuned to reproduce the non-idealities of a 0.35 μm CMOS double-poly triple-metal technology. It is based on circuit-level simulations but is extremely more efficient and can be used to run the statistical tests that assure the quality of the output stream.
Keywords
CMOS integrated circuits; analogue-digital conversion; chaos generators; circuit simulation; integrated circuit modelling; mixed analogue-digital integrated circuits; random number generation; 0.35 micron; ADC-based random number generator; CMOS double-poly triple-metal technology; circuit-level simulation; interleaved chaotic map; macro-model; pipeline analog-to-digital converter; Analog-digital conversion; CMOS technology; Chaos; Circuit simulation; Circuit testing; Cryptography; Data security; Entropy; Pipelines; Random number generation;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN
0-7803-8834-8
Type
conf
DOI
10.1109/ISCAS.2005.1465594
Filename
1465594
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