Title :
A low-power wideband frequency doubler in 0.18 μm CMOS
Author :
Murji, Rizwan ; Deen, M. Jamal
Author_Institution :
Dept. of Electr. & Comput. Eng., McMaster Univ., Hamilton, Ont., Canada
Abstract :
The paper presents a new design technique for a wideband, low-power implementation of a frequency doubler in a 0.18 μm CMOS technology. The frequency doubler consists of two identical unbalanced source-coupled pairs, whose inputs are connected in parallel and its output taken single-ended. The design is based on the quadratic square-law characteristics of a MOS transistor in saturation. The frequency doubler operates at a low supply voltage of 1 V and consumes 0.985 mW of power at a 3 dB bandwidth of 4 GHz.
Keywords :
CMOS analogue integrated circuits; frequency multipliers; integrated circuit design; low-power electronics; 0.18 micron; 0.985 mW; 1 V; 4 GHz; CMOS technology; MOS transistor; low-power frequency doubler; low-power wideband frequency doubler; quadratic square-law characteristics; saturation; unbalanced source-coupled pairs; Bandwidth; CMOS technology; Circuits; Frequency synthesizers; Local oscillators; MOSFETs; Signal generators; Voltage; Wideband; Wireless communication;
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
DOI :
10.1109/ISCAS.2005.1465595
