A 1-V fully integrated CMOS frequency synthesizer for 5-GHz WLAN

A fully integrated 5 GHz phase-locked loop (PLL) based frequency synthesizer operating from a 1 V power supply was implemented in a 0.18 μm CMOS technology. An on-chip Dickson charge pump is used to generate the relatively high voltage necessary to achieve the desired frequency tuning range of the LC VCO. Fully differential circuitry is used in order to reduce sensitivity to noise. A settling time of 40 μs was measured, corresponding to a 310 MHz output frequency step. The power consumption is 29.9 mW, achieving a phase noise of -96.3 dBc/Hz at 1 MHz and -115.9 dBc/Hz at 10 MHz offsets. The overall tuning range is 700 MHz.