Architectures for analog motion estimation processors: a comparison

The use of analog techniques in the design of motion estimation (ME) processors has shown substantial power saving over digital implementations in the literature. However, previous works tend to concentrate on the advantages of using analog techniques rather than the limitations due to inevitable circuit variations. This paper evaluates the impact of mismatch errors on the performance of architectures for analog ME processors for video conferencing applications. An improved architecture is proposed which features circuit input-offset error cancellation, thereby overcoming the limitations of previous approaches.