Title :
CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example]
Author :
Kumaki, Takeshi ; Kuroda, Yasuto ; Koide, Tetsushi ; Mattausch, Hans Jurgen ; Noda, Hideyuki ; Dosaka, Katsumi ; Arimoto, Kazutami ; Saito, Kazunori
Author_Institution :
Res. Center for Nanodevices & Syst., Hiroshima Univ., Japan
Abstract :
Huffman coding is probably the best known and most widely used data compression technique. Nevertheless, the task of further decreased compression ratio through Huffman code up-dating in real-time is still a largely unsolved problem. In this paper, a novel architecture for CAM (content addressable memory)-based Huffman coding with real-time optimization of the code word table, called CHRC, is proposed. A CAM is exploited to implement fast Huffman encoding, and simultaneously the code word table is reconstructed and up-dated in realtime. The effectiveness of the proposed architecture is verified by structure, encoding flow and simulation results. The example of a JPEG application shows that our proposed CHRC method is able to achieve up to 40% smaller encoded picture sizes, and 6 times smaller clock cycle number for the encoding hardware than conventional Huffman coding methods.
Keywords :
Huffman codes; VLSI; content-addressable storage; image coding; CAM-based VLSI architecture; CHRC; Huffman coding; JPEG; code word table reconstruction; code word table updating; compression ratio; content addressable memory; data compression techniques; encoded picture sizes; fast Huffman encoding; real-time code word table optimization; CADCAM; Clocks; Computer aided manufacturing; Data compression; Encoding; Hardware; Huffman coding; Image coding; Image reconstruction; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
DOI :
10.1109/ISCAS.2005.1465807