DocumentCode :
3547895
Title :
An 800 Mbps system interconnect modeling and simulation for high speed computing
Author :
Sharawi, Mohammad S. ; Aloi, Daniel N.
Author_Institution :
Dept. of Electr. & Syst. Eng., Oakland Univ., Rochester, MI, USA
fYear :
2005
fDate :
23-26 May 2005
Firstpage :
6198
Abstract :
System interconnect modeling for high speed systems is a vital bottleneck for high speed data transfer. We demonstrate the modeling process on a high speed computer differential net running at 400 MHz (800 Mbit/s) with IBM I/O cells. The modeling of the traces on the boards was done using a field solver. The transmission line matrices were used in a SPICE model, and 3-simulation scenarios were tested for this model. The obtained EYE opening of the modeled interconnect simulation was 705 mV while the measured EYE opening for the same net topology in the laboratory was 710 mV. This shows a close match between the actual behavior and the model generated. Careful modeling can be very beneficial to get a design running at first time operation.
Keywords :
SPICE; integrated circuit interconnections; printed circuit design; printed circuits; transmission line matrix methods; 400 MHz; 800 Mbit/s; EYE opening; IBM I/O cells; SPICE model; high speed computer differential net; high speed computing; simulation; system interconnect modeling; transmission line matrices; Computational modeling; Connectors; Driver circuits; Electromagnetic modeling; Etching; Frequency; Integrated circuit interconnections; Personal digital assistants; Power cables; Wire; High Speed; Interconnect; PCB; Signal In-tegrity;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium on
Print_ISBN :
0-7803-8834-8
Type :
conf
DOI :
10.1109/ISCAS.2005.1466056
Filename :
1466056
Link To Document :
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