Title :
Monitoring scheme for minimizing power consumption by means of supply and threshold voltage control in active and standby modes
Author :
Nomura, Masahiro ; Ikenaga, Yoshifumi ; Takeda, Koichi ; Nakazawa, Yoetsu ; Aimoto, Yoshiharu ; Hagihara, Yasuhiko
Author_Institution :
Syst. Devices & Res. Labs., NEC Corp., Sagamihara, Japan
Abstract :
This paper describes a newly developed monitoring scheme for minimizing power consumption by means of supply voltage VDD and threshold voltage VTH dynamic control in active and standby modes. In the active mode, on the basis of delay monitoring results, either VDD control or VTH control is selected to avoid any oscillation problem between them. Switching current ISW and leakage current ILEAK are monitored, and VTH is adjusted so as to maintain that ratio known to indicate minimum power consumption. In the standby mode, the precision of optimum body bias monitoring is improved by taking into consideration the effects of lowered VDD and gate-oxide leakage current. Experimental results with a 90-nm CMOS device indicate that the proposed scheme results in successful ISW/ILEAK ratio maintenance and successful detection of optimum body bias conditions (IOFF = ISUB (= GIDL + IGB)) to within 20% of actual minimum leakage current values.
Keywords :
CMOS integrated circuits; circuit optimisation; leakage currents; low-power electronics; power supply circuits; switched current circuits; voltage control; 90 nm; CMOS integrated circuits; VDD control; VTH control; active mode; dynamic control; leakage current; optimum body bias monitoring; power consumption minimization; standby mode; supply voltage control; switching current; threshold voltage control; Circuits; Clocks; Condition monitoring; Control systems; Energy consumption; Leakage current; National electric code; Temperature dependence; Threshold voltage; Voltage control;
Conference_Titel :
VLSI Circuits, 2005. Digest of Technical Papers. 2005 Symposium on
Print_ISBN :
4-900784-01-X
DOI :
10.1109/VLSIC.2005.1469393