• DocumentCode
    3553285
  • Title

    Normally off silicon Schottky barrier FET and its application to integrated circuits

  • Author

    Kawamura, Noritaka ; Shinoda, D. ; Igarashi, R. ; Muta, Hidemasa ; Seki, Yoshiaki

  • Volume
    16
  • fYear
    1970
  • fDate
    1970
  • Firstpage
    142
  • Lastpage
    142
  • Abstract
    A "normally off" silicon Schottky-barrier FET (SBFET) has been realized. The normal off characteristic was obtained by controlling the thickness of the reacted PtSi layer under the gate so that the depletion layer of the PtSi-Si Schottky-barrier contact might extend over the n-channel layer (n = 1.0 × 1016/cm3, t = 0.30 µm) and just reach the high resistivity (~ 3 kilohm-cm) p-type substrate. The threshold voltage was controlled in the range, 0 < Vth < 0.1 volt.
  • Keywords
    Application specific integrated circuits; FET integrated circuits; Insulation; Logic arrays; Metal-insulator structures; Nonhomogeneous media; Schottky barriers; Silicon; Testing; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices Meeting, 1970 International
  • Type

    conf

  • DOI
    10.1109/IEDM.1970.188329
  • Filename
    1476441
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3553285