An ion-implanted Schottky-barrier junction field effect transistor

Techniques of fabricating an N-channel silicon JFET using phosphorus ion implantation and a platinum silicide Schottky-barrier gate have been developed. The platinum silicide Schottky-barrier top gate is part of the standard contact metallization process. The phosphorus doped channel is accomplished by a 50 KeV ion implant predeposition and an 1100°C drive-in. A range of dosages and drive-in times were used to achieve various FET characteristics. A pinch-off voltage range of 0.2-7.5 volts has been obtained with typical spreads of approximately 0.1 volt across the slice. Results have been obtained for both and oriented boron doped silicon substrates. The advantages of these techniques which include fabrication simplicity, tight distributions of characteristics, and the ability to achieve various pinch-offs by implant dose adjustment will be discussed.