Drain voltage limitations of short-channel M.O.S. transistors

The maximum drain voltage for which an M.O.S.T. still obeys its normal pentode-like characteristics is an important consideration, especially to the circuit designer. For short channel devices the restrictions on the maximum drain voltage are even more severe than for longer channel devices, and therefore an accurate method of predicting these voltage limitations is required. The drain voltage is limited by two mechanisms; namely (a) punch-through of the drain depletion region to the source and (b) breakdown due to impact ionization in the high field region at the drain edge. A two-dimensional analysis technique for determining the drain voltage at the onset of either punch-through or avalanche breakdown, from a solution of Poisson´s Equation within the substrate depletion region, is adopted. The punch-through voltage is defined as the drain-to-source voltage at which the longitudinal field at any point along the edge of the source region inverts in sign to permit the drift of minority carriers from source to drain. Breakdown voltage, however, is determined by the drain voltage at which the maximum field in the device reaches the critical value for avalanche multiplication. Good agreement is achieved between theoretical and practical results for both mechanisms on a variety of devices. The effects of varying both the physical device parameters and gate voltage are also described.