DocumentCode
3553741
Title
N-Channel gallium arsenide MISFET
Author
Miyazaki, T. ; Nakamura, N. ; Doi, A. ; Tokuyama, Takeshi
Author_Institution
Hitachi Ltd., Tokyo, Japan
Volume
19
fYear
1973
fDate
1973
Firstpage
164
Lastpage
167
Abstract
Fabrication processes have been developed for the construction of an n-channel insulated-gate gallium arsenide field effect transistor (MISFET). GaAs-insulator interface properties were investigated from an analysis of MIS characteristics Energy distributions of interface state density were U shape having minimum values near the midgap energy. The minimum values were dependent upon conduction type of substrates amd deposition conditions of insulator films and ranged
cm-2eV-1for p-type substrates and
cm-2eV-1for n-type substrates. The n+-regions for source and drain were made by diffusion of tin from the tin-doped silica film or by implantation of silicon ions. The planar passivated diode showed leakage current of less than 1 µA at 5 V reverse bias. An n-channel MISFET was fabricated using above techniques. The maximum field effect mobility of 1480 cm2V-1sec-1was obtained.
cm-2eV-1for p-type substrates and
cm-2eV-1for n-type substrates. The n+-regions for source and drain were made by diffusion of tin from the tin-doped silica film or by implantation of silicon ions. The planar passivated diode showed leakage current of less than 1 µA at 5 V reverse bias. An n-channel MISFET was fabricated using above techniques. The maximum field effect mobility of 1480 cm2V-1sec-1was obtained.Keywords
Conductive films; FETs; Fabrication; Gallium arsenide; Insulation; Interface states; MISFETs; Shape; Substrates; Tin;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices Meeting, 1973 International
Type
conf
DOI
10.1109/IEDM.1973.188675
Filename
1477552
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