Title :
A study of quench-in defects and interface states of MOS structures
Author_Institution :
General Electric Corporate Research and Development, Schenectady, New York
Abstract :
The induced defects and interface states in MOS structures as a result of high temperature oxidation are investigated using a transient capacitance technique. Samples after dry oxidation at 1000°C were slowly cooled down to 700°C before pulling out. The densities of traps and interface states were shown to be 2 to 5 times lower than that for fast cooled samples. The major bulk traps are at EC-0.26 and EC-0.49 while the major interface state distribution resides at EC-0.6 eV. The carrier lifetime for the slowly cooled samples is a factor of 10 longer than that for the fast cooled ones, while the surface recombination velocity is smaller for the slowly cooled samples. The results suggest that the interface states and the bulk are the consequence of quenched-in impurities.
Keywords :
Annealing; Capacitance; Density measurement; Electron traps; Furnaces; Helium; Hydrogen; Interface states; Oxidation; Temperature;
Conference_Titel :
Electron Devices Meeting, 1977 International
DOI :
10.1109/IEDM.1977.189191