DocumentCode
3554565
Title
Assignable interconnects for multiprocessor systems
Author
Smith, J.W.
Author_Institution
Dept. of Comput. Sci., Georgia Univ., Athens, GA, USA
fYear
1991
fDate
7-10 Apr 1991
Firstpage
1189
Abstract
The situation with compute node interconnection is briefly reviewed, the most immediate benefits of assignable interconnect are presented, and a method for assignable interconnect is described. In its early form, the assignable interconnect may result in raw performance, which is lower than with static interconnect; but lower system cost, increased flexibility, and potential for further development (scalability) recommend the assignable interconnect for multisystem implementations. The assignable interconnect will ameliorate the birthplace problem by removing physical location as a consideration in the connection scheme
Keywords
multiprocessor interconnection networks; assignable interconnects; compute node interconnection; multiprocessor systems; multisystem implementations; raw performance; scalability; Communication system control; Computer science; Concurrent computing; Geometry; Manufacturing; Multiprocessing systems; Operating systems; Parallel processing; Routing; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Southeastcon '91., IEEE Proceedings of
Conference_Location
Williamsburg, VA
Print_ISBN
0-7803-0033-5
Type
conf
DOI
10.1109/SECON.1991.147954
Filename
147954
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