DocumentCode :
3554935
Title :
Sub 100NS 16K × 1 MOS dynamic RAM using a grounded substrate
Author :
Reese, E.A. ; White, L.S. ; Redwine, D.J. ; Hong, N. ; McAlexander, J.C. ; Mohan Rao, G.R.
Author_Institution :
Texas Instruments Incorporated, Houston, Texas
fYear :
1979
fDate :
3-5 Dec. 1979
Firstpage :
355
Lastpage :
357
Abstract :
A high performance state-of-the-art single supply 16K × 1 NMOS dynamic RAM was designed and fabricated using a grounded substrate and employing an evolutionary semiempirical short channel transistor model. The semiempirical device model is compatible with LSI CAD circuit simulation. Refresh time improvements utilizing the grounded substrate approach are highlighted.
Keywords :
DRAM chips; Electrodes; Electrons; Equations; Intrusion detection; Leakage current; MOS capacitors; Random access memory; Testing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1979 Internationa
Conference_Location :
Washington, DC, USA
Type :
conf
DOI :
10.1109/IEDM.1979.189624
Filename :
1480489
Link To Document :
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