DocumentCode :
3555377
Title :
MOS fabrication process integrating self-aligned polysilicon gate and post-processed metal gate devices on a single die
Author :
Butler, Ronald D. ; Beaty, Robert E.
Author_Institution :
Dept. of Electr. Eng., Auburn Univ., AL, USA
fYear :
1991
fDate :
12-14 Jun 1991
Firstpage :
199
Lastpage :
203
Abstract :
A microelectronic process allowing successful fabrication of polysilicon gate and replacement metal gate devices on the same die is described. The characteristics of aluminium replaced gate devices are compared to those of coexistent polysilicon gate devices showing agreement with theoretical predictions. Following standard processing, plasma back-etching steps are used to form the replacement gates. Virtually any material which can be deposited and patterned on silicon dioxide can be used as the replacement gate material
Keywords :
MOS integrated circuits; aluminium; integrated circuit technology; sputter etching; Al-SiO2-Si; MOS fabrication process; Si-SiO2-Si; microelectronic process; plasma back-etching steps; post-processed metal gate devices; replacement gate material; replacement metal gate devices; self-aligned polysilicon gate; standard processing; test chip; Dry etching; Electrodes; Fabrication; Inorganic materials; Plasma applications; Plasma devices; Plasma immersion ion implantation; Plasma materials processing; Plasma properties; Wet etching;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
University/Government/Industry Microelectronics Symposium, 1991. Proceedings., Ninth Biennial
Conference_Location :
Melbourne, FL
ISSN :
0749-6877
Print_ISBN :
0-7803-0109-9
Type :
conf
DOI :
10.1109/UGIM.1991.148150
Filename :
148150
Link To Document :
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