Silicon molecular beam epitaxy as a VLSI processing technique

Silicon Molecular Beam Epitaxy is reviewed emphasizing the technical and economic factors that will affect its VLSI application. Experimental work of the 1960´s and early 1970´s is first briefly discussed. A modern apparatus is then described and used to illustrate recent innovations. These include sample loading interlocks, full wafer processing, ion implantation doping, sample rotation, and 1% regulation of doping level and deposition uniformity. Generalized growth procedures are described. Homoepitaxial layer quality is demonstrated using electrical and crystallographic data. The techniques of evaporated and ionized doping are compared and examples of doping profiles presented. SOS and metal silicide experiments are used to demonstrate the advantages of heteroepitaxial MBE growth. Preliminary device work is described, including P-N, PIN, and varactor diodes, MOS and bipolar transistors. A final section describes possible areas for future Si MBE experiments. A favorable projection of cost and capabilities suggests wide VLSI application.