DocumentCode :
3555538
Title :
Schottky MOSFET for VLSI
Author :
Koeneke, C.J. ; Sze, S.M. ; Levin, R.M. ; Kinsbron, E.
Author_Institution :
Bell Laboratories, Murray Hill, New Jersey
Volume :
27
fYear :
1981
fDate :
1981
Firstpage :
367
Lastpage :
370
Abstract :
Recently MOSFET with Schottky source and drain has been considered an important candidate for VLSI because of its ultra-shallow junctions to minimize short-channel effects, low source and drain series resistances, simplified processes, and the elimination of minority carrier injection into the substrate [1]. We present results of MOSFETs with 300Å PtSi as the source and drain contacts. The devices are fabricated on 2 × 1015cm-3, oriented n-Si substrates; and the gate oxide thickness is 250-300Å. Long-channel behavior is observed for devices with channel lengths down to 1 µm, in very good agreement with the generalized guide for MOSFET miniaturization[2]. We observe that the output currents are smaller than those for the conventional MOSFETs. This is explained by the potential barrier arising in the gap between the Schottky source contact and the inversion channel. Extensive Arrhenius plots indicate that the gap has a profound effect in enhancing the corner field which in turn can greatly increase the current availability from the source. By reducing the gap to about 100Å, the current approaches that as expected from the Pao-Sah theory[3].
Keywords :
Electric resistance; Electric variables measurement; Electrical resistance measurement; Fabrication; MOSFET circuits; Protection; Schottky barriers; Silicon; Sputter etching; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting, 1981 International
Type :
conf
DOI :
10.1109/IEDM.1981.190089
Filename :
1482042
Link To Document :
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