A low-leakage VLSI CMOS/SOS process with thin EPI layers

A new VLSI process was successfully developed for short-channel CMOS/SOS circuits on thin 0.3 µm epi layers. Two kinds of thin epi material were used. The first was grown by a standard CVD process, while the second was prepared by a double solid phase epitaxial regrowth (DSPE) technique. CMOS/SOS ring oscillators with effective channel lengths ranging from 0.7 to 1.3 µm were fabricated. Leakage currents below 3.0 pA/µm were achieved on both n-channel and p-channel devices. The DSPE material showed improvement in both mobility and speed.