Performance of CMOS circuits with LDD-type NMOSFET´s for high density static RAM´s

CMOS circuit performances using 1.2 µm NMOSFET´s with lightly doped drain (LDD) are described. While the drivability is reduced by 17% in LDD-type NMOSFET´s compared with the conventional ones, the propagation delay time in CMOS ring oscillators and access time in CMOS static RAM´s with 1.2 µm LDD-type NMOSFET´s are found to be increased by 8% and 5%, respectively. This indicates that the CMOS circuit performances are less sensitive to the transconductance, gm, degradation of LDD-type NMOSFET characteristics. The device life time is predicted using the empirical equations in which the gm degradation is expressed as a function of the stress time and the substrate current in NMOSFET´s. The results show that the LDD-type CMOS devices are predominantly superior to the conventional ones in reliability under higher drain voltage operation. Furthermore, latch-up and soft error endurances in NMOSFET structure are also discussed. Finally, it is concluded that the merit of the LDD-type structure in reliability overcomes its drawback in speed characteristics for 1.2 µm-rule-designed CMOS VLSI´s.