Multiple self-alignment MOS technology (MUSA/MOST)

Multiple self-alignment MOS technology, MUSA/MOST, has been developed to achieve higher packing density and higher performance for Si MOSFETs. The minimum mask feature of 1.5 µm allows fabrication of a 0.5 µm channel length FET in an active device area as narrow as 3.5 µm. This significantly reduces parasitic capacitances and increases device packing density. Metal and metal-silicide can be employed to form the gate and source/drain electrodes, respectively, resulting in reduction of VLSI circuit wiring-delays. The fabricated ring oscillator with enhancement drivers and depletion loads of MUSA/MOSTs exhibited a propagation delay of 540 ps/stage under the 2 µm design rule.