Novel process and device technologies for submicron 4Mb CMOS EPROMs

High performance and reliable submicron EPROM technologies to realize 4Mb density and fast operation speed have been developed. The main key process technologies are (a) thin reliable inter-poly dielectrics, (b) SAC (Self Aligned Contact) using RTA (Rapid Thermal Annealing), and (c) low resistance polycide gate. The device uses 0.8µm N-well CMOS technology. Masked MLDD(Moderately Lightly Doped Drain) NMOS transistors are used in peripheral circuits. Submicron EPROM cell offers sufficiently fast write speed and soft-write endurance.