DocumentCode :
3558702
Title :
Adapting to the times [review of Adaptive Techniques for Dynamic Processor Optimization: Theory and Practice (Wang, A. and Naffziger, S., Eds.; 2008)]
Author :
Sapatnekar, Sachin
Author_Institution :
University of Minnesota
Volume :
25
Issue :
5
fYear :
2008
Firstpage :
496
Lastpage :
497
Abstract :
The focus of this volume is on postsilicon adaption to overcome process and environmental variations, to ensure that a design operates to specifications even in the presence of process and environmental variations. Some of the topics covered include: an introduction, discussing sources of variation and the notion of a control system with a feedback loop to adaptively compensate for variations; adaptively changing body biases, processor frequencies, and supply voltages to react to variations; an Intel view, demonstrated on the design of a TCP/IP processor with dynamic and adaptive supply voltage, body bias, and frequency optimization, including measurement results; building ultradynamic-voltage-scaled (UDVS) systems; the design of the XScale embedded processor; the design of sensors for monitoring critical-path delays under variations, including control and calibration mechanisms; architectural methods for adaptive computing; asynchronous systems and adaptation; and SRAM design and optimization and testing techniques specific to adaptive systems, as demonstrated on the Intel Montecito processor. The book brings together a variety of voices, explaining various views regarding on-chip adaptation. The overall story comes across extraordinarily well and lucidly.
Keywords :
Adaptive control; Adaptive systems; Buildings; Control systems; Design optimization; Feedback loop; Frequency measurement; Programmable control; TCPIP; Voltage control;
fLanguage :
English
Journal_Title :
Design Test of Computers, IEEE
Publisher :
ieee
ISSN :
0740-7475
Type :
jour
DOI :
10.1109/MDT.2008.125
Filename :
4648433
Link To Document :
بازگشت