DocumentCode
3559629
Title
A parallel convolutional coder including embedded puncturing with application to consumer devices
Author
Sherratt, R. Simon
Author_Institution
Sch. of Syst. Eng., Univ. of Reading, Reading
Volume
54
Issue
4
fYear
2008
fDate
11/1/2008 12:00:00 AM
Firstpage
1647
Lastpage
1650
Abstract
As consumers demand more functionality from their electronic devices and manufacturers supply the demand then electrical power and clock requirements tend to increase, however reassessing system architecture can fortunately lead to suitable counter reductions. To maintain low clock rates and therefore reduce electrical power, this paper presents a parallel convolutional coder for the transmit side in many wireless consumer devices. The coder accepts a parallel data input and directly computes punctured convolutional codes without the need for a separate puncturing operation while the coded bits are available at the output of the coder in a parallel fashion. Also as the computation is in parallel then the coder can be clocked at 7 times slower than the conventional shift-register based convolutional coder (using DVB 7/8 rate). The presented coder is directly relevant to the design of modern low-power consumer devices.
Keywords
clocks; consumer electronics; convolutional codes; counting circuits; low-power electronics; clock rate; counter reduction; electronic devices; embedded puncturing; low-power consumer device; parallel convolutional coder; system architecture reassessment; wireless consumer devices; Clocks; Concurrent computing; Convolution; Convolutional codes; Digital video broadcasting; Educational technology; Error correction codes; Hardware; Space technology; Wireless LAN; 802.11; Consumer Device; DVB; Parallel Convolutional Coder; Power Reduction;
fLanguage
English
Journal_Title
Consumer Electronics, IEEE Transactions on
Publisher
ieee
Conference_Location
11/1/2008 12:00:00 AM
ISSN
0098-3063
Type
jour
DOI
10.1109/TCE.2008.4711215
Filename
4711215
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