DocumentCode
356067
Title
Complexity of merged two´s complement multiplier-adders
Author
Choe, Gwangwoo ; Swartzlander, Earl E., Jr.
Author_Institution
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
Volume
1
fYear
1999
fDate
1999
Firstpage
384
Abstract
Merged 2´s complement multiplier-adders have been realized to compute multi-term inner products that were conventionally from discrete components: multipliers and adders. Merged arithmetic dissolves the boundary and reduces the complexity as the number of product terms increases. It is attractive for portable and low power applications such as wireless communications
Keywords
adders; digital arithmetic; low-power electronics; multiplying circuits; complexity; discrete components; low power applications; merged two´s complement multiplier-adders; multi-term inner products; product terms; wireless communications; Adders; Arithmetic; Digital signal processing; Equations; Matrix converters; Power engineering computing; Signal design; Signal processing algorithms; USA Councils; Wireless communication;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1999. 42nd Midwest Symposium on
Conference_Location
Las Cruces, NM
Print_ISBN
0-7803-5491-5
Type
conf
DOI
10.1109/MWSCAS.1999.867286
Filename
867286
Link To Document