Title :
A 71 Msample/sec fifth order sigma-delta digital modulator
Author :
Gao, Yonghong ; Tenhunen, Haniiu
Author_Institution :
ESDLab, R. Inst. of Technol., Stockholm, Sweden
Abstract :
A 71 Msample/sec fifth order digital modulator with an oversampling ratio of 32 has been designed in a 0.6 μm 3.3 V CMOS technology. To achieve such a high sampling rate, the structure of the modulator is carefully selected in order to reduce the latency in feedback loops. Carry-save adders are also utilized to facilitate high speed operation. Based on the analysis and simulation results, simple feedback coefficients for adjusting the NTF zero positions are employed and the internal word-length is scaled down without significant degradation of the performance
Keywords :
CMOS integrated circuits; adders; circuit feedback; sigma-delta modulation; 0.6 micron; 3.3 V; CMOS technology; carry-save adders; feedback coefficients; feedback loops; fifth order sigma-delta digital modulator; high speed operation; internal word-length; latency; oversampling ratio; sampling rate; Adders; Analytical models; CMOS technology; Degradation; Delay; Delta-sigma modulation; Digital modulation; Feedback loop; Performance analysis; Sampling methods;
Conference_Titel :
Circuits and Systems, 1999. 42nd Midwest Symposium on
Conference_Location :
Las Cruces, NM
Print_ISBN :
0-7803-5491-5
DOI :
10.1109/MWSCAS.1999.867303
