• DocumentCode
    3564017
  • Title

    FFT based sum product decoding algorithm of LDPC coder for GF(q)

  • Author

    Patel, Jigisha ; Chapatwala, Neeta ; Patel, Mrugesh

  • Author_Institution
    E & C Dept., Sardar Vallabhai Nat. Inst. of Technol., Surat, India
  • fYear
    2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    Low Density Parity Check (LDPC) codes have excellent error correcting performance. LDPC codes are one of the block coding techniques and it performs near Shannon limit and recommended for many practical applications. Non-binary LDPC codes extension of binary LDPC in error correcting property especially for short and moderate block length. In many digital communication systems these codes have strong competitors of turbo codes for error control. Low Density Parity Check as it name is suggests that in a parity check matrix (H) consists of very small number of non-zero elements comparing with zero elements. The strength of the LDPC code defines Parity Check Matrix (PCM). LDPC code contains two types of decoding algorithms hard and soft decision algorithm. By comparing with other traditional decoding algorithm FFT based sum product algorithm reduced computation complexity with better decoding performance. In this paper, LDPC codes for FFT based sum product decoding algorithm performances are analysed for various order of Galois Field GF(q) using AWGN channel. Decoding performance measured in terms of symbol error rate which improve with increasing order of Galois field.
  • Keywords
    AWGN channels; Galois fields; block codes; error correction codes; fast Fourier transforms; parity check codes; turbo codes; AWGN channel; FFT based sum product decoding algorithm; Galois field; block coding techniques; digital communication systems; error correcting performance; hard decision algorithm; low density parity check codes; nonbinary LDPC codes extension; parity check matrix; soft decision algorithm; turbo codes; AWGN channels; Algorithm design and analysis; Decoding; Galois fields; Parity check codes; Sum product algorithm; Vectors; AWGN Channel; Bit Flipping; FFT based Sum Product Algorithm; NB-LDPC;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Emerging Technology Trends in Electronics, Communication and Networking (ET2ECN), 2014 2nd International Conference on
  • Print_ISBN
    978-1-4799-6985-2
  • Type

    conf

  • DOI
    10.1109/ET2ECN.2014.7044980
  • Filename
    7044980