DocumentCode
3564427
Title
Inexact computing with approximate adder application
Author
Allen, Christopher I. ; Langley, Derrick ; Lyke, James C.
Author_Institution
Air Force Inst. of Technol. (AFIT), Dayton, OH, USA
fYear
2014
Firstpage
21
Lastpage
28
Abstract
This paper presents an analysis of an inexact N-bit ripple carry adder architecture. Results show that a 30 percent power reduction is achieved for several approximate adders while maintaining a root-mean square error of 16 percent.
Keywords
adders; carry logic; mean square error methods; approximate adder application; inexact N-bit ripple carry adder architecture; inexact computing; power reduction; root-mean square error; Adders; Approximation methods; Inverters; Logic gates; Minimization; Power dissipation; Probabilistic logic;
fLanguage
English
Publisher
ieee
Conference_Titel
Aerospace and Electronics Conference, NAECON 2014 - IEEE National
Print_ISBN
978-1-4799-4690-7
Type
conf
DOI
10.1109/NAECON.2014.7045768
Filename
7045768
Link To Document