FPGA based one-cycle control of multilevel cascaded H-Bridge inverter

This paper presents One-Cycle Control (OCC) of nine-level cascaded H-bridge inverter implemented in Altera FPGA Cyclone-III. The OCC, being a nonlinear technique, overcomes some problems related to nonlinear nature of switching power converters, thus allowing fast dynamic response and robustness to power source and load perturbations. An optimum power sharing strategy, among different modules of the multilevel inverter, is also presented that equalizes power sharing at the each H-bridge. After a description of the system some simulation results obtained in ModelSim are presented showing the effectiveness of the OCC which follows the reference signal, sinusoidal, in a concrete manner with the capability of regaining steady-state in just one switching cycle. There is neither dynamic error or steady-state error between the reference signal and the switched output.