DocumentCode :
3567753
Title :
A differential method for analysis of hot-electron degradation in floating-gate memory cells with a single-trap resolution
Author :
Tkachev, Yuri ; Jong-Won Yoo
Author_Institution :
Silicon Storage Technol., Inc., San Jose, CA, USA
fYear :
2014
Firstpage :
90
Lastpage :
93
Abstract :
A new differential method for the precise analysis of hot-electron degradation in the floating-gate memory cells with a single-trap resolution is described. The method is based on the use of a test structure, containing two cells with a shared floating gate.
Keywords :
flash memories; hot carriers; integrated circuit testing; differential method; flash memory; floating-gate memory cells; hot-electron degradation analysis; shared floating gate; single-trap resolution; test structure; Degradation; Electron traps; Kinetic theory; Logic gates; Nonvolatile memory; Programming; Flash memory; electron trapping; electron tunneling; floating gate; memory reliability; oxide degradation; program-erase cycling endurance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Integrated Reliability Workshop Final Report (IIRW), 2014 IEEE International
Print_ISBN :
978-1-4799-7308-8
Type :
conf
DOI :
10.1109/IIRW.2014.7049518
Filename :
7049518
Link To Document :
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