An energy-efficient dynamic-integrator-based ΔΣ modulator

An energy-efficient second-order ΔΣ modulator for low-power, low-frequency applications has been demonstrated. It uses a dynamic common-source integrator, where a MOSFET turns off after charge redistribution is completed. Thus, there are virtually no static current flows in the present integrator, reducing the power consumed by the ΔΣ modulator. A chip was fabricated as a proof of concept. A peak signal-to-noise-and-distortion ratio (SNDR) of 70dB was obtained at a sampling frequency of 0.5 MHz with an oversampling ratio (OSR) of 128. We proved that power consumption was proportional to the sampling frequency and that low figure-of-merit (FOM) values were obtained for a relatively wide range of the sampling frequencies, which agrees well with predictions obtained from circuit simulations.