DocumentCode :
3571068
Title :
Power Efficient Code Converters Using Adiabatic Array Logic
Author :
Konwar, Shruti ; Singha, Thockchom Birjit ; Roy, Soumik
Author_Institution :
Dept. of Electron. & Commun. Eng., Tezpur Univ., Tezpur, India
fYear :
2014
Firstpage :
167
Lastpage :
172
Abstract :
Adiabatic logic brings about a great deal of power minimization in digital circuits. An application of the same is presented here by proposing a new design of some code converters-BCD to Excess-3, Binary to Gray and Gray to Binary, using the Adiabatic Array Logic. The proposed circuits show lesser power dissipation than the conventional static CMOS logic style and Two Phase Clocked Adiabatic Logic (2PASCL). The simulation is carried out in NI-Multisim software at 0.18μm, 1.8V CMOS standard process technology over a frequency range of 200-800MHz.
Keywords :
CMOS logic circuits; circuit simulation; code convertors; digital circuits; logic arrays; 2PASCL; BCD; CMOS standard process technology; Excess-3; NI-multisim software; adiabatic array logic; circuit simulation; code converters; digital circuit; power dissipation; power efficient code converter; power minimization; static CMOS logic style; two phase clocked adiabatic logic; Arrays; CMOS integrated circuits; Clocks; Energy dissipation; Logic gates; Power dissipation; Power supplies; 2PASCL; Adiabatic logic; adiabatic array logic; code converters; power dissipation; power saving;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Emerging Applications of Information Technology (EAIT), 2014 Fourth International Conference of
Type :
conf
DOI :
10.1109/EAIT.2014.56
Filename :
7052040
Link To Document :
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