DocumentCode :
3572602
Title :
Isolation design comparisons for 0.5 μm CMOS technology using SILO process
Author :
Guegan, G. ; Deleonibus, S. ; Lerme, M. ; Blanc, P.
Author_Institution :
LETI (CEA-Technologies Avanc?ƒ?©es), CEN/G-85X - F38041 Grenoble Cedex
fYear :
1992
Firstpage :
13
Lastpage :
16
Abstract :
SILO process with R.T.N. of silicon is an alternative isolation scheme, which provides both small field encroachment and rigorous isolation with 0.8 μm active area spacing. Two field doping processes were developed for 0.5 μm CMOS technology and were extensively compared.
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1992. ESSDERC '92. 22nd European
Print_ISBN :
444894780
Type :
conf
Filename :
5435222
Link To Document :
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