DocumentCode :
3578229
Title :
An Algorithm of Software Defined Radio Channel Processing Based on FPGA
Author :
Jiang-Tao Gong ; Chuan-Wu Tan
Author_Institution :
Dept. of Railway Commun. & Signal, Hunan Railway Prof. Technol. Coll., Zhuzhou, China
fYear :
2014
Firstpage :
39
Lastpage :
41
Abstract :
A SDR (software defined radio) channel model is put forward in the paper. It is shown that the model will be a multiple FIR filters bank for different frequency bands. Base on the model, a distributed algorithm is deduced by the formula which is suitable for FPGA to achieve the multiple FIR filters bank. At last, the block diagram for FPGA to realized the distributed algorithm is presented which can implement the SDR channel processing.
Keywords :
FIR filters; channel bank filters; distributed algorithms; field programmable gate arrays; software radio; wireless channels; FIR filter bank; FPGA; SDR channel model; distributed algorithm; field programmable gate arrays; software defined radio channel processing; Distributed algorithms; Field programmable gate arrays; Filter banks; Finite impulse response filters; IIR filters; Software radio; FIR filter; FPGA; SDR; channel processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Wireless Communication and Sensor Network (WCSN), 2014 International Conference on
Print_ISBN :
978-1-4799-7090-2
Type :
conf
DOI :
10.1109/WCSN.2014.14
Filename :
7061690
Link To Document :
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