A comparative study on low power adders using microwind EDA tool

From the past few years a variety of low power adders have been proposed to reduce the overall power consumption of micro-electronic systems. The role of adders are important in almost all fields of engineering and applied sciences. With the help of low power adders, all the other systems which make use of adders may dissipate less power. This study presents a detailed comparison between various low power 1-bit full adders. This study focuses mainly on the comparisons among conventional Complementary Metal Oxide Semiconductor (CMOS) adder, bridge style adder, transmission gate adder, square root based adder and static energy recovery full adder, etc. All the simulation results are done using Digital Schematic (DSCH) editor and the functionality is verified using the Microwind layout editor tool. The sole objective of this study to conclude with a better estimate and ease in selecting a low power adder for the required application.