Ultra area efficient reversible Quantum Radix-2 booth´s recoding multiplier for low power applications

Reversible logic plays a vital role in Quantum computing and Nanotechnology which in future can be applied for low power processor applications. In this paper, we propose, ultra area efficient reversible quantum multiplier based on Radix-2 Booth´s recoding algorithm. The Non-Fault tolerant Radix-2 Booth´s recoding architecture is designed and optimized for Quantum Cost and Garbage Outputs. The proposed methodology for reversible quantum multiplier shows the improvement in terms of Quantum Cost, Garbage Outputs and gates count compared to all the existing reversible quantum multiplier designs.