Title :
Elecdra: a rule-based circuit analyzer for custom VLSI design
Author_Institution :
L-Logic Design Group, Sunnyvale, CA, USA
Abstract :
This paper presents procedures that verify custom CMOS/BiCMOS VLSI circuits for their compliance to a given set of pre-defined rules or design styles. Predefined rules range from simple connectivity and sizing rules to specific circuit topologies ensuring acceptable circuit speed, reliability, and signal integrity. Our compliance checker, Elecdra, operates on transistor-level circuit netlists, which may contain back-annotated parasitics. Custom VLSI microprocessors with over 3 million devices have been successfully verified by Elecdra at the full-chip level
Keywords :
CMOS digital integrated circuits; VLSI; integrated circuit design; microprocessor chips; CMOS microprocessor; EDRA; Elecdra; back-annotated parasitic; compliance checker; connectivity; custom VLSI design; full-chip level; reliability; rule-based circuit analyzer; signal integrity; sizing; speed; topology; transistor-level circuit netlist; verification; BiCMOS integrated circuits; Calculus; Circuit analysis; Circuit topology; Coupling circuits; Data structures; Design methodology; Microprocessors; Runtime; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1997. ISCAS '97., Proceedings of 1997 IEEE International Symposium on
Print_ISBN :
0-7803-3583-X
DOI :
10.1109/ISCAS.1997.621479
