Title :
A low-IF AGC amplifier for DSRC receiver
Author :
Hung-Wen Lin ; Wu-Wei Lin ; Chun-Yen Lin
Author_Institution :
Dept. of Electr. Eng., YuanZe Univ., Chungli, Taiwan
Abstract :
This paper proposes an auto-gain-control amplifier for DSRC IF receiver. The test chip was realized in 0.18-um CMOS technology and occupied an active area of 0.064 mm2. With a supply voltage of 1.8 V, the total power consumption was 10.5 mW. VGA exhibited a maximum gain of 82 dB and a dynamic range of 73 dB. For a 40-MHz of IF band, the ASK modulation index ranged from 0.23 to 1, and the data rate ranged from 10 kbps to 2.5 Mbps.
Keywords :
CMOS integrated circuits; amplitude shift keying; automatic gain control; frequency shift keying; low noise amplifiers; low-power electronics; radio receivers; CMOS technology; DSRC IF receiver; auto-gain-control amplifier; dedicated short-range communication; low-IF AGC amplifier; power 10.5 mW; size 0.18 mum; voltage 1.8 V; CMOS integrated circuits; CMOS technology; Demodulation; MOS devices; Oscilloscopes; Switches; Voltage measurement; AGC; ASK; DSRC; RSSI; VGA;
Conference_Titel :
SoC Design Conference (ISOCC), 2014 International
DOI :
10.1109/ISOCC.2014.7087545
