DocumentCode
3588015
Title
Scalable hardware-based power management for many-core systems
Author
Bin Liu ; Bohnenstiehl, Brent ; Baas, Bevan M.
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of California, Davis, Davis, CA, USA
fYear
2014
Firstpage
1834
Lastpage
1838
Abstract
Due to high levels integration, the design of many-core systems becomes increasingly challenging. Runtime dynamic voltage and frequency scaling (DVFS) is an effective method in managing the power based on performance requirements in the presence of workload variations. This paper presents an on-line scalable hardware-based dynamic voltage frequency selection algorithm, by using both FIFO occupancy and stall information between processors. To demonstrate the proposed solution, two real application benchmarks are tested on a many-core globally asynchronous locally synchronous (GALS) platform. The experimental results show that the proposed approach can achieve near-optimal power saving under performance constraints.
Keywords
multiprocessing systems; power aware computing; DVFS; FIFO occupancy; dynamic voltage-and-frequency scaling; many-core GALS platform; many-core globally asynchronous locally synchronous platform; on-line scalable hardware-based dynamic voltage frequency selection algorithm; scalable hardware-based power management; workload variations; Benchmark testing; Engines; Heuristic algorithms; Power grids; Program processors; Threshold voltage; Voltage control; Dynamic voltage and frequency scaling (DVFS); globally asynchronous locally synchronous (GALS); many-core processors; multi-processor systems-on-chip (MPSoCs);
fLanguage
English
Publisher
ieee
Conference_Titel
Signals, Systems and Computers, 2014 48th Asilomar Conference on
Print_ISBN
978-1-4799-8295-0
Type
conf
DOI
10.1109/ACSSC.2014.7094785
Filename
7094785
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