DocumentCode
3591100
Title
TriKon: A hypervisor aware manycore processor
Author
Bhalla, Rohan ; Kallurkar, Prathmesh ; Gupta, Nitin ; Sarangi, Smruti R.
Author_Institution
Comput. Sci. Dept., Indian Inst. of Technol., New Delhi, New Delhi, India
fYear
2014
Firstpage
1
Lastpage
10
Abstract
Virtualization is increasingly being deployed to run applications in a cloud computing environment. Sadly, there are overheads associated with hypervisors that can prohibitively reduce application performance. A major source of the overheads is the destructive interference between the application, OS, and hypervisor in the memory system. We characterize such overheads in this paper, and propose the design of a novel Triangle cache that can effectively mitigate destructive interference across these three classes of workloads. We subsequently, proceed to design the TriKon manycore processor that consists of a set of heterogeneous cores with caches of different sizes, and Triangle caches. To maximize the throughput of the system as a whole, we propose a dynamic scheduling algorithm for scheduling a class of system and CPU intensive applications on the set of heterogeneous cores. The area of the TriKon processor is within 2% of a baseline processor, and with such a system, we could achieve a performance gain of 12% for a suite of benchmarks. Within this suite, the system intensive benchmarks show a performance gain of 20% while the performance of the compute intensive ones remains unaffected. Also, by allocating extra area for cores with sophisticated cache designs, we further improved the performance of the system intensive benchmarks to 30%.
Keywords
cache storage; cloud computing; multiprocessing systems; processor scheduling; virtualisation; CPU intensive applications; OS; TriKon manycore processor; Triangle cache; baseline processor; cache designs; cloud computing environment; destructive interference mitigation; dynamic scheduling algorithm; heterogeneous cores; hypervisor aware manycore processor; memory system; performance gain; virtualization; Benchmark testing; Context; Interference; Multicore processing; Operating systems; Processor scheduling; Virtual machine monitors; architecture support for virtu-alization; cloud; hypervisor;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computing (HiPC), 2014 21st International Conference on
Print_ISBN
978-1-4799-5975-4
Type
conf
DOI
10.1109/HiPC.2014.7116710
Filename
7116710
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