Performance Prediction of Visual Algorithms on Different Hardware Architectures

In many specialties related to computer vision, such as video processing for object inspection, microscopy or video surveillance, a performance requirement arises, the choice of hardware architecture that sized well is crucial for experts in image processing. However, these experts are not always expert in hardware architecture and are not always able to estimate a priori the performance of their algorithms on a given architecture. Here, we propose the first elements of a tool that will be able to predict the performance, in term of time, of a given vision algorithm. Convolution is studied as an unavoidable algorithm in computer vision. We designed some benchmarks where different parameters related to the convolution where studied: size of the filter, size of the image, parallelism. Our results showed that it is possible with a correct accuracy to obtain a prediction of the timing of the convolution with three different architectures with a limited number of parameters. In future work, other algorithmic building blocks will be tested to validate our approach on a complex algorithm that will be a combination of identified building blocks. We want to propose an algorithmic language for image processing that applies to hardware performance.