• DocumentCode
    3592902
  • Title

    Maximizing electrical capabilities of test setup resources to enhance detection of setup problems (Test setup comprehensive- diagnostic)

  • Author

    Velasco, Jonathan A. ; Bullag, Rex ; Atienza, Janice

  • Author_Institution
    ON Semicond. Philippines Inc., Carmona, Philippines
  • fYear
    2014
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    This paper will explain occurrences and resolution of identified hardware issues encountered across all Test Sections - Wafer Sort and Final Test. The closed loop system was carefully utilized to stimulate test set-up resources thru the modification of test program, it achieves detection of defective/ abnormal functioning test hardware components, test cables, tester resources, and wrong values mounted on the test board (installed during repair) that results to low yield issues and test escapes. It´s a powerful tool in detection and rapid intervention of set-up failures before product testing. Relating to current ATE system diagnostics, the uniqueness of the tool is being implemented per device level. Detection: stimulating the tester resources in order to utilize the component under test and to measure the response with respect to the expected values and tolerance. Implementation: modifying software or hardware to add the specific tests to identify defective test setup components and setting up a limit that will be the reference for the measurement. A Graphical User Interface will pop up and prompt the status of the test setup and provide quick reference on possible root causes of the setup failures.
  • Keywords
    electron device testing; electronic engineering computing; graphical user interfaces; ATE system diagnostics; closed loop system; defective test setup component identification; device level; electrical capability maximization; graphical user interface; hardware issue; product testing; set-up failures; setup problem detection enhancement; test board; test cables; test hardware component; test program modification; test setup comprehensive-diagnostic; test setup resources; tester resources; wafer sort-final test; Calibration; Current measurement; Graphical user interfaces; Hardware; Manufacturing; Relays; Voltage measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Manufacturing Technology Conference (IEMT), 2014 IEEE 36th International
  • Type

    conf

  • DOI
    10.1109/IEMT.2014.7123110
  • Filename
    7123110