DocumentCode
3596876
Title
Simulation for the optimal placement of decoupling capacitors on printed circuit board
Author
Kamo, Atsushi ; Watanabe, Takayuki ; Asai, Hideki
Author_Institution
Fac. of Eng., Shizuoka Univ., Hamamatsu, Japan
Volume
3
fYear
2001
Firstpage
727
Abstract
This paper describes a method for the optimal placement of the decoupling capacitors on the printed circuit board (PCB). This method searches the optimal position of decoupling capacitor so that the impedance characteristics at the power supply is minimized in the specified frequency range. In this method, the PCB is modeled by the PEEC method to handle the 3-dimensional structures and the Krylov-subspace technique is applied to obtain efficiently the impedance characteristics in the frequency domain
Keywords
capacitors; circuit layout CAD; circuit simulation; printed circuit layout; 3D structures; Krylov-subspace technique; PCB; PCB is model; PEEC method; decoupling capacitors; impedance characteristics; optimal placement; printed circuit board; Capacitors; Circuit simulation; Coupling circuits; Electromagnetic coupling; Equations; Finite difference methods; Frequency; Impedance; Power supplies; Printed circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on
Print_ISBN
0-7803-6685-9
Type
conf
DOI
10.1109/ISCAS.2001.921435
Filename
921435
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