Integrated High Speed Current-Mode Frequency Divider with Inductive Peaking Structure

In this paper, a high performance current mode logic (CML) frequency divider is introduced in an integrated CMOS phase-locked loop (PLL). Inductive peaking structure and cascode circuit are applied in the CML frequency divider to obtain the broad-band and high frequency operation. In order to obtain a stable operation with low power, the resistor in the inductive peaking structure is replaced by the cascode circuit. DC bias voltage is applied in MOS gate as a current source in the divider. The proposed frequency divider is applied in the conventional PLL which is integrated with 0.18 μm CMOS process. Simulation test shows that the 2:1 divider is operated at the input frequency of 20 GHz with the power consumption of 15 mW.