A VHDL electrothermal modeling of power electronic circuits

This paper presents a methodology to model in VHDL the electrothermal behavior of power electronic circuits. This model allows to simulate as a whole a system compounded of analog components and a digital control described in VHDL, making easier the design and verification of the digital control. The thermal model allows study of the devices´ junction temperature for different devices and working conditions from the early design phase.